Characterizing and operating a non-volatile memory device

ABSTRACT

A sequence of contiguous pages in an erase block in a non-volatile memory device is programmed and erased. Next, all of the pages in the erase block are programmed with data. Then, the data is read back and verified to determine whether there is an error in the data. When there is an error in the data, then the last page in the sequence is identified as being unstable. If there is no error in the data, then the last page in that sequence is identified as being stable. Thus, the recorded information identifies a point of instability in the erase block. Instabilities can be stabilized by performing additional writes to fill the partially filled word line.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims the benefit of priority under 35 U.S.C. §120 as a continuation of U.S. patent application Ser. No. 15/484,038,entitled “Characterizing and Operating a Non-Volatile Memory Device,”filed Apr. 10, 2017, which claims the benefit of priority under 35U.S.C. § 120 as a continuation of U.S. patent application Ser. No.14/991,484, entitled “Characterizing and Operating a Non-Volatile MemoryDevice,” filed Jan. 8, 2016, now U.S. Pat. No. 9,620,227, thedisclosures of which are hereby incorporated by reference in theirentirety for all purposes.

BACKGROUND

Businesses accumulate tremendous amounts (e.g., petabytes) of data indatabases that are stored on all kinds of media including, for example,tapes, hard disk drives, volatile memory devices such as random accessmemory (RAM), and non-volatile memory devices (NVMDs) such as solidstate drives (SSDs). The use of NVMDs instead of other storage mediasuch as RAM to store large amounts of data presents some challenges.NVMDs have longer read and write latencies relative to, for example,double data rate type three synchronous dynamic RAM (DDR3 DRAM). Also,NVMDs are erased before being written to and can only be erased alimited number of times before wearing out.

On the other hand, the capacity of NVMDs makes them more practical thanRAM for storing large amounts of data. Also, when power to RAM is lostor interrupted, the data held by the RAM is lost. NVMDs use NAND-basedflash memory, for example, which retains data even when power is lost.Thus, the advantages of NVMDs include their capacity and non-volatility.

The basic unit of each NVMD read/write operation is referred to as apage. There are multiple writeable pages grouped per word line. Atypical contemporary word line includes four pages. NVMDs are alsoorganized into erase blocks. An erase block is the smallest unit atwhich data can be erased from an NVMD. Each erase block includesmultiple pages. A typical contemporary erase block may include, forexample, 512 pages.

To mitigate their longer access time (read and write latencies), data iswritten to NVMDs in parallel. In general, writes are made in acontrolled or systematic manner. For example, in an erase blockcontaining 512 pages, writes are performed starting at the first page(page 0), proceeding in sequence through the last page (page 511) andthen onto the next erase block. However, in high-performance NVMDs,writes may not be performed all the way to the end of an erase blockbefore a switch is made to another erase block. Thus, an erase block maybe only partially filled with data, in which case the erase block maycontain at least one word line that is only partially written. A wordline is said to be partially written if only a subset of the pages inthe word line (e.g., less than four pages) have been written(programmed) with data.

An erase block in an NVMD may be unreliable when a word line is onlypartially written. That is, data written to a page in a partiallywritten word line is vulnerable to a higher than acceptable error rate.A page in which data may be compromised over an acceptable level may bereferred to as a weak page or instability.

Recent 2Y 20 nanometer (nm) flash memory devices are particularlysusceptible to errors if a partially filled erase block (containing apartially filled word line) is erased. There are not mechanisms that canbe used to detect and correct errors due to instability. The instabilityis such that when the erase block is subsequently written to and thenread from, some of the data that is read may be incorrect but cannot becorrected by error-correcting code (ECC) because, for example, thenumber of erroneous bits exceeds the error-correcting capability of theECC. This can result in a loss of data. Such errors can be widespreadthroughout the NVMD to the extent that, under some circumstances, thebest or only way to proceed is to avoid using problematic erase blocks.However, this results in a loss of memory capacity.

SUMMARY

Instabilities in an erase block can be stabilized by performingadditional writes to fill a partially filled word line. Embodimentsaccording to the present invention pertain to methods that can be usedto characterize an NVMD to identify erase blocks, if any, that haveinstabilities, and to identify where the instabilities within each ofthose erase blocks are located.

Embodiments according to the invention also pertain to methods that canbe used to stabilize instabilities in those erase blocks. Embodimentsaccording to the invention also pertain to NVMDs that utilize thosemethods.

In an embodiment according to the present invention, a sequence ofcontiguous pages in an erase block is programmed and erased. Next, allof the pages in the erase block are programmed with data. Then, the datais read back and verified to determine whether there is an error in thedata. If there is an error in the data, then the last page in theaforementioned sequence is identified as being unstable. If there is noerror in the data, then the last page in that sequence is identified asbeing stable. An unstable page may be referred to herein as aninstability point, and a stable page may be referred to herein as astability point.

The series of operations described in the preceding paragraph isperformed for different sequences of contiguous pages in the eraseblock. In an embodiment, the operations are performed for the sequencethat includes the first page in the erase block (page 0), then for thesequence that includes the first page and the second page (page 1) inthe erase block, then for the sequence that includes the first, second,and third pages (pages 0, 1, and 2) in the erase block, and so on untilit is performed for all of the pages in the erase block. In such anembodiment, for an erase block that includes N pages (where N is apositive integer), the operations are performed for N differentsequences of contiguous pages, where the Mth set of the differentsequences consists of M contiguous pages comprising the pages in theerase block corresponding to all integer values of K from K=1(corresponding to page 0) to K=M (corresponding to page M−1), where M isan integer value from 1 to N inclusive. In this manner, any instabilitypoints in the erase block are detected and stability points in the eraseblock are determined and recorded. The process is repeated for eacherase block.

When data is subsequently written to an erase block that has beencharacterized as just described, information identifying the last pagewritten is recorded. In an embodiment, that information is maintained inDRAM. When the erase block is to be erased, a check is performed beforethe erase block is erased to determine if the erase block is stabilized.Specifically, a check is performed to determine whether the last pagewritten has reached a stability point for the erase block. If so, theerase block is erased. If not, then dummy data is written to fill theword line containing the last page written. That is, dummy data iswritten to the erase block until a stability point is passed or at leastreached. Once a stability point is reached, then the erase block iserased.

In the event of a planned shutdown, the process just described isperformed for each of the erase blocks. That is, prior to the shutdown,the state of each erase block is checked to see if the erase blockcontains data up to or past a respective stability point. Erase blocksnot filled to a stability point are stabilized using dummy data. Theshutdown proceeds once all of the erase blocks are stabilized.

In the event of an unplanned (and hence unexpected) shutdown,information about the last page written prior to the shutdown for eacherase block may be lost. In that case, in an embodiment, when aninstruction is received to erase a particular erase block after anunplanned shutdown (e.g., on bootup following an unplanned shutdown),then that erase block is scanned before it is erased to identify thelast page written. That is, the erase block is scanned only if it is tobe erased. If the erase Hock is not filled to a stability point, thendummy data is written to the erase block until a stability point is atleast reached or passed. Once a stability point is reached, then theerase block is erased. Alternatively, all erase blocks can be scannedduring bootup after the unplanned shutdown, to determine the last pagewritten in each erase block.

In summary, in embodiments according to the present invention, stabilitypoints of each erase block can be determined and that information can beused to determine whether an erase block is stable and to stabilize anunstable erase block before it is erased. Thus, embodiments according tothe present invention improve the reliability of NVMDs (e.g., SSDs suchas flash memory devices). Because it is no longer necessary to avoidpotentially unstable erase blocks, the capacities of NVMDs are notreduced.

These and other objects and advantages of the various embodiments of thepresent invention will be recognized by those of ordinary skill in theart after reading the following detailed description of the embodimentsthat are illustrated in the various drawing figures.

BRIEF DESCRIPTION OF DRAWINGS

The accompanying drawings, which are incorporated in and form a part ofthis specification and in which like numerals depict like elements,illustrate embodiments of the present disclosure and, together with thedetailed description, serve to explain the principles of the disclosure.

FIG. 1 a block diagram showing elements of a computer system upon whichembodiments according to the present invention can be implemented.

FIG. 2 is a block diagram illustrating a non-volatile memory die (NVMD)in an embodiment according to the present invention.

FIG. 3 is a block diagram conceptually illustrating the topology of anerase block in an NVMD die in an embodiment according to the presentinvention.

FIG. 4A is a block diagram conceptually illustrating a grouping of pagesper word line in the erase block in an embodiment according to thepresent invention.

FIG. 4B is a block diagram conceptually illustrating a partially writtenerase block in an embodiment according to the present invention.

FIG. 5 is a flowchart of a method for characterizing an NVMD in anembodiment according to the present invention.

FIG. 6 is a flowchart of a method for operation with an NVMD in anembodiment according to the present invention.

FIG. 7 is a flowchart of a method for performing a planned shutdown ofan NVMD in an embodiment according to the present invention.

FIG. 8 is a flowchart of a method for responding to an unplannedshutdown of an NVMD in an embodiment according to the present invention.

DETAILED DESCRIPTION

Reference will now be made in detail to the various embodiments of thepresent disclosure, examples of which are illustrated in theaccompanying drawings. While described in conjunction with theseembodiments, it will be understood that they are not intended to limitthe disclosure to these embodiments. On the contrary, the disclosure isintended to cover alternatives, modifications and equivalents, which maybe included within the spirit and scope of the disclosure as defined bythe appended claims. Furthermore, in the following detailed descriptionof the present disclosure, numerous specific details are set forth inorder to provide a thorough understanding of the present disclosure.However, it will be understood that the present disclosure may bepracticed without these specific details. In other instances, well-knownmethods, procedures, components, and circuits have not been described indetail so as not to unnecessarily obscure aspects of the presentdisclosure.

Some portions of the detailed descriptions that follow are presented interms of procedures, logic blocks, processing, and other symbolicrepresentations of operations on data bits within a computer memory.These descriptions and representations are the means used by thoseskilled in the data processing arts to most effectively convey thesubstance of their work to others skilled in the art. In the presentapplication, a procedure, logic block, process, or the like, isconceived to be a self-consistent sequence of steps or instructionsleading to a desired result. The steps are those utilizing physicalmanipulations of physical quantities. Usually, although not necessarily,these quantities take the form of electrical or magnetic signals capableof being stored, transferred, combined, compared, and otherwisemanipulated in a computer system. It has proven convenient at times,principally for reasons of common usage, to refer to these signals astransactions, bits, values, elements, symbols, characters, samples,pixels, or the like.

It should be borne in mind, however, that all of these and similar termsare to be associated with the appropriate physical quantities and aremerely convenient labels applied to these quantities. Unlessspecifically stated otherwise as apparent from the followingdiscussions, it is appreciated that throughout the present disclosure,discussions utilizing terms such as “programming,” “erasing,” “reading,”“writing,” “determining,” “repeating,” “recording,” “scanning,”“receiving,” “identifying,” “accessing,” or the like, refer to actionsand processes (e.g., flowcharts 500, 600, 700, and 800 of FIGS. 5, 6, 7,and 8, respectively) of an apparatus or computer system or similarelectronic computing device or processor (e.g., the computer system 100of FIG. 1). A computer system or similar electronic computing devicemanipulates and transforms data represented as physical (electronic)quantities within memories, registers or other such information storage,transmission or display devices.

Embodiments described herein may be discussed in the general context ofcomputer-executable instructions residing on some form ofcomputer-readable storage medium, such as program modules, executed byone or more computers or other devices. By way of example, and notlimitation, computer-readable storage media may comprise non-transitorycomputer storage media and communication media. Generally, programmodules include routines, programs, objects, components, datastructures, etc., that perform particular tasks or implement particularabstract data types. The functionality of the program modules may becombined or distributed as desired in various embodiments.

Computer storage media includes volatile and nonvolatile, removable andnon-removable media implemented in any method or technology for storageof information such as computer-readable instructions, data structures,program modules or other data. Computer storage media includes, but isnot limited to, random access memory (RAM), read only memory (ROM),electrically erasable programmable ROM (EEPROM), flash memory (e.g., anSSD or NVMD) or other memory technology, compact disk ROM (CD-ROM),digital versatile disks (DVDs) or other optical storage, magneticcassettes, magnetic tape, magnetic disk storage or other magneticstorage devices, or any other medium that can be used to store thedesired information and that can accessed to retrieve that information.

Communication media can embody computer-executable instructions, datastructures, and program modules, and includes any information deliverymedia. By way of example, and not limitation, communication mediaincludes wired media such as a wired network or direct-wired connection,and wireless media such as acoustic, radio frequency (RF), infrared andother wireless media. Combinations of any of the above can also beincluded within the scope of computer-readable media.

FIG. 1 a block diagram showing elements of a computer system or device100 upon which embodiments according to the present invention can beimplemented. The system 100 may include elements other than those shown.

In the example of FIG. 1, the system 100 includes a central processingunit (CPU) 101 and a memory 103. The system 100 is coupled to orincorporates a non-volatile memory device (NVMD) 102, which may also beknown as a solid state drive (SSD) or a flash memory device. The memory103 may be, for example, dynamic random access memory (DRAM).

The NVMD 102 includes a controller 104 and a number of storage elements,specifically a chip array 110 that includes a number of dies or chips106 that are used to store data. In an embodiment, the dies 106 includeany number of non-volatile memory elements such as NAND flash elements,and as such the NVMD 102 may be referred to as a NAND flash device.Alternatively, the dies may include NOR flash elements. There may be anynumber of dies 106.

The controller 104 can be implemented as an application-specificintegrated circuit (ASIC) or field-programmable gate array (FPGA) thatis embedded in the NVMD 102. In general, the controller 104 includescontrol circuitry that facilitates reading, writing, erasing, and otheroperations on the dies 106. In an embodiment, the controller 104includes a flash translation layer (FTL), a write path, and a read path.The write path may include a physical layer (PHY) interface and aserializer/deserializer that converts data between the analog anddigital domains (from analog to digital, and from digital to analog).The write path may also include a data compression block, an encryptionblock, and an error correction code (ECC) encoding block. The read pathmay include an ECC decoding block, a decryption block, and adecompression block. The controller 104 is coupled to the dies 106 via,for example, an Open NAND Interface (ONFI). A chip select (CS) signal isused by the controller 104 to locate, address, and/or activate aparticular one of the dies 106.

FIG. 2 is a block diagram illustrating a die 106 in an embodimentaccording to the present invention. In the example of FIG. 2, the die106 is organized into a number n of erase blocks 212. Each erase blockincludes a subset of the non-volatile memory elements located on the die106. Although the memory elements in the die 106 may be programmed(written) and read in smaller groups (e.g., pages), all memory elementswithin an erase block are erased together.

FIG. 3 is a block diagram conceptually illustrating the topology of anerase block 212 in an embodiment according to the present invention. Inthe example of FIG. 3, the erase block 212 is organized into a number Nof pages 314. In an embodiment, there are 512 pages in an erase block(pages 0 to N−1). In an embodiment, each page is the same size; eachpage stores the same amount of data (e.g., 16 kilobytes).

FIG. 4A is a block diagram conceptually illustrating a grouping of pagesper word line in the erase block 212 in an embodiment according to thepresent invention. In the example of FIG. 4A, there are four pages perword line; a page is a part of a word line (a single word line). In anembodiment in which the erase block 212 includes 512 pages, there are128 word lines (m=128). Data is written to the erase block 212 startingat page 0, then to page 1, page 2, and page 3, then to the next wordline, and so on. If all of the pages in the erase block 212 areprogrammed (written, or filled with data), then subsequent data iswritten to another erase block.

However, as mentioned previously herein, there may be instances in whichan erase block is not completely filled (not entirely programmed orwritten). For example, with reference to FIG. 4B, only the first sixpages (pages 0-5) of the erase block 212 may be written (as indicated bythe shading in the figure). In that case, word line 0 is filled, butword line 1 is only partially filled (partially written). As mentionedpreviously herein, an erase block may be unreliable when a word line isonly partially written. As will be described below, embodimentsaccording to the present invention pertain to methods that can be usedto characterize an NVMD to identify erase blocks, if any, that haveinstabilities and to identify where instabilities are located withineach of those erase blocks. Embodiments according to the invention alsopertain to methods that can be used to stabilize instabilities in eraseblocks.

In overview, in an embodiment according to the present invention, asequence of contiguous pages in an erase block is programmed and erased.Next, all of the pages in the erase block are programmed with data.Then, the data is read back and verified to determine whether there isan error in the data. When there is an error in the data, then the lastpage in the aforementioned sequence is identified as being unstable. Ifthere are no errors in the data, then the last page in that sequence isidentified as being stable. An unstable page may be referred to hereinas an instability point, and a stable page may be referred to herein asa stability point.

The series of operations described in the preceding paragraph isperformed for different sequences of contiguous pages in the eraseblock. In an embodiment, the operations are performed for the sequenceincluding only the first page in the erase block (page 0), then for thesequence including the first page and the second page (page 1) in theerase block, then for the sequence including the first, second, andthird pages (pages 0, 1, and 2) in the erase block, and so on until itis performed for all of the pages in the erase block. As mentionedabove, a sequence is programmed and erased, then all of the pages in theerase block are programmed and the data is read back and verified,before the next sequence is programmed and erased. In this manner, anyinstability points in the erase block are detected and stability pointsin the erase block are determined. The process is repeated for eacherase block.

FIG. 5 is a flowchart 500 of a method for characterizing an NVMD (e.g.,the WNW 102 of FIG. 1) organized into n erase blocks (e.g., the eraseblocks 212 of FIG. 2) in an embodiment according to the presentinvention, where each erase block includes N pages and where N is apositive integer. In an embodiment, N=512. In an embodiment, some or allof the operations of the flowchart 500 are performed using aninput/output writer and verifier that may be implemented in softwareexecuting on a host computer system that is in communication with theNVMD (e.g., like the computer system of FIG. 1).

In block 502, the Mth set consisting of M contiguous pages isprogrammed. Initially, M=1 and so the first set, consisting of the firstpage (page 0, corresponding to M=1), is programmed. As will be seen, thevalue of M is incremented so that the operations about to be describedwill be repeated for N different sequences of contiguous pages, wherethe Mth set of the different sequences consists of M contiguous pagescomprising the pages in the erase block corresponding to all integervalues of K from K=1 to K=M, where M is an integer value from 1 to Ninclusive, where K=1 corresponds to page 0, K=2 corresponds to page 1,and so on.

In block 504, the page(s) programmed in block 502 are erased.

In block 506, all N pages in the erase block are programmed. The pagescan be programmed with dummy (test) data. The dummy data is a known setof data, so that when the data is subsequently read and verified, anyerrors in that data will be detected.

In block 508, all of the pages in the erase block are read and verified.If there are errors in the data, then the flowchart 500 proceeds toblock 510. Otherwise, the flowchart 500 proceeds to block 512.

In block 510, if there is an error in the data read in block 508, thenthe page corresponding to the current value of M is identified as beingunstable. Note that the page corresponding to the current value of M isthe last page in the sequence of contiguous pages that was programmed inblock 502.

In block 512, if there are no errors in the data read in block 508, thenthe page corresponding to the current value of M is identified as beingstable. This page may be referred to herein as a stability point for theerase block because, if the erase block past is programmed up to or pastthat page, then the erase block can be stabilized.

In block 514, information identifying the stability point is recorded.This information can be recorded in any suitable location from which itcan be subsequently retrieved. For example, this information can berecorded in the memory of the host computer system that is performingthe operations described above and then transferred to a page in theNVMD itself for persistent storage, so that information can subsequentlybe accessed and used during operation with the NVMD (as will bedescribed in the discussion of FIGS. 6, 7, and 8, below).

In block 516 of FIG. 5, the value of M is incremented (M=M+1). If M isless than or equal to N (not greater than N), then the flowchart 500returns to block 502. Otherwise, the flowchart ends.

In this manner, the stability points in the erase block are determinedand recorded. In an embodiment, only the last stability point in theerase block is recorded; that is, only the stability point having thegreatest value for M is recorded. The process described by the flowchart500 is repeated for each erase block in the NVMD. Note that informationthat identifies instability points can also be recorded, or informationthat identifies instability points can be recorded as an alternative torecording information that identifies stability points. In general,information that is useful for identifying stability points is recorded.

It has been observed that erasing a page in an erase block takes longerat stability points. Thus, in an alternative implementation, the amountof time needed to erase a page relative to other pages can be used toidentify stability points.

The operations of FIG. 5 are further described by way of example withreference to FIG. 4B. First, page 0 (corresponding to K=M=1) isprogrammed, then erased. Next, all of the pages in the erase block 212are programmed (written) with data. Then, all the pages in the eraseblock 212 are read and the data that is read is verified against thedata that was written. If there is an error in the data, then page 0 isidentified as an instability point and that information may be recorded.If there are no errors in the data, then page 0 is identified as astability point and that information is recorded.

Next, pages 0 and 1 (corresponding to M=2 and K=1, 2) are programmed,then erased. Next, all of the pages in the erase block 212 areprogrammed with data. Then, all the pages in the erase block 212 areread and the data that is read is verified against the data that waswritten. If there is an error in the data, then page 1 (the last pagewritten in the current sequence) is identified as an instability pointand that information may be recorded. If there are no errors in thedata, then page 1 is identified as a stability point and thatinformation is recorded.

Next, pages 0, 1, and 2 (corresponding to M=3 and K=1, 2, and 3) areprogrammed, then erased. Next, all of the pages in the erase block 212are programmed with data. Then, all the pages in the erase block 212 areread and the data that is read is verified against the data that waswritten. If there is an error in the data, then page 2 (the last pagewritten in the current sequence) is identified as an instability pointand that information may be recorded. If there are no errors in thedata, then page 2 is identified as a stability point and thatinformation is recorded.

The process in the example above is repeated until a sequence thatconsists of all N pages (M=N and K=1, 2, 3, . . . , N−1, N) isprogrammed, erased, and programmed with data that is read and verified.In this manner, any instability in the erase block 212 will be detectedand may be recorded, and stability points in the erase block are alsoidentified and recorded.

FIG. 6 is a flowchart 600 of a method for operating with an NVMD (e.g.,the NVMD 102 of FIG. 1) organized into erase blocks (e.g., the eraseblocks 212 of FIG. 2) in an embodiment according to the presentinvention. The operations of the flowchart 600 are performed after theoperations of the flowchart 500 are performed. In an embodiment, some orall of the operations of the flowchart 600 are performed in softwareexecuting on a computer system such as the system 100 of FIG. 1.

In block 602 of FIG. 6, data is written to a sequence of pages in anerase block of the NVMD.

In block 604, after the data is written to the erase block, informationthat identifies the last page in the sequence of pages is recorded. Thelast page written in the sequence is equivalent to the last page writtenin the erase block. In an embodiment, that information is recorded inthe memory 103 (e.g., DRAM) of FIG. 1, for efficient access and quicklookup.

In block 606, an instruction to erase the erase block is received (e.g.,by the controller 104 of FIG. 1).

In block 608, prior to erasing the erase block in response to theinstruction, a determination is made as to whether the last page writtenhas reached a stability point for the erase block. More specifically,the information recorded in block 604 can be compared to the informationrecorded in block 514 of FIG. 5, to determine whether the last pagewritten in the erase block is at or beyond a stability point for theerase block. The stability point for the erase block may be the laststability point in the erase block, or it may the stability pointclosest to but after the last page written. If the stability point hasbeen reached, then the flowchart 600 proceeds to block 612; otherwise,the flowchart proceeds to block 610.

In block 610, when the last page written has not reached a stabilitypoint, additional sequential pages of the erase block are programmed(e.g., with dummy data) until the last page of the additional pageswritten is at or after a stability point.

In block 612, when a stability point is reached, the erase block can beerased in response to the instruction of block 606.

With reference again to FIG. 4B, consider an example in which astability point is identified as page 7. In response to an instructionto erase the erase block 212 per block 606 of FIG. 6, the recorded stateinformation that identifies the last page written (page 5 in the exampleof FIG. 4B) is compared to the recorded information that identifies thestability point before the erase block is erased. Because the writtendata has not reached the stability point, additional pages (e.g., pages6 and 7) are programmed (e.g., with dummy data) per block 610 of FIG. 6,so that the additional pages that are written up to or past thestability point. In other words, word line 1, which was previously onlypartially filled, is now entirely filled with data. In this manner, theerase block 212 is stabilized and can then be erased.

FIG. 7 is a flowchart 700 of a method for performing a planned shutdownof an NVMD (e.g., the NVMD 102 of FIG. 1) organized into erase blocks(e.g., the erase blocks 212 of FIG. 2) in an embodiment according to thepresent invention. The operations of the flowchart 700 are performedafter the operations of the flowchart 500 are performed. In anembodiment, some or all of the operations of the flowchart 700 areperformed in software executing on a computer system such as the system100 of FIG. 1.

In block 702 of FIG. 7, data is written to a sequence of pages in anerase block of the NVMD.

In block 704, after the data is written to the erase block, informationthat identifies the last page in the sequence of pages is recorded, forexample, in the memory 103 (e.g., DRAM) of FIG. 1.

In block 706, prior to the planned shutdown, a determination is made asto whether the last page written in the erase block has reached astability point. More specifically, the information recorded in block704 can be compared to the information recorded in block 514 of FIG. 5,to determine whether the last page written in the erase block is at orbeyond a stability point for the erase block. The stability point forthe erase block may be the last stability point in the erase block, orit may the stability point closest to but after the last page written.If a stability point has been reached, then the flowchart 700 proceedsto block 710; otherwise, the flowchart proceeds to block 708.

In block 708, when the last page written has not reached a stabilitypoint, additional sequential pages of the erase block are programmed(e.g., with dummy data) until the last page of the additional pageswritten is up to or past a stability point, similar to what is describedabove in the discussion of FIG. 6.

In block 710 of FIG. 7, when a stability point is reached, the plannedshutdown is allowed to proceed.

The operations of the flowchart 700 are performed because theinformation recorded in block 704 is stored in volatile memory and hencemay be lost if power is removed during the shutdown. On the other hand,the data held in the erase block will persist even if power is removedduring the shutdown. Hence, the erase block is stabilized before theshutdown and will remain stabilized during and after the shutdown.Consequently, if an instruction is received to erase the erase blockafter the shutdown, it is not necessary to rely on the informationrecorded in block 704 (which may no longer exist) to determine whetheror not the erase block is stable.

FIG. 8 is a flowchart 800 of a method for responding to an unplannedshutdown of an NVMD (e.g., the NVMD 102 of FIG. 1) organized into eraseblocks (e.g., the erase blocks 212 of FIG. 2) in an embodiment accordingto the present invention. The operations of the flowchart 800 areperformed after the operations of the flowchart 500 are performed. In anembodiment, some or all of the operations of the flowchart 800 areperformed in software executing on a computer system such as the system100 of FIG. 1.

In block 802 of FIG. 8, data is written to a sequence of pages in anerase block of the NVMD.

In block 804, after the data is written to the erase block, informationthat identifies the last page in the sequence of pages is recorded, forexample, in the memory 103 (e.g., DRAM) of FIG. 1.

In block 806, an unplanned shutdown of the NVMD occurs, the unplannedshutdown ends, and the NVMD is returned to operation (booted up). In anunplanned shutdown, the recorded state information about the last pagewritten may be lost.

In block 808, after the unplanned shutdown, an instruction to erase theerase block is received. In particular, for example, an instruction maybe received to erase the erase block on bootup following the unplannedshutdown.

In block 810, prior to erasing the erase block in response to theinstruction, the erase block is scanned to determine whether the lastpage written has reached a stability point for the erase block. Morespecifically, the information about the last page written can becompared to the information recorded in block 514 of FIG. 5, todetermine whether the last page written in the erase block is at orbeyond a stability point for the erase block. The stability point forthe erase block may be the last stability point in the erase block, orit may the stability point closest to but after the last page written.If a stability point has been reached, then the flowchart 800 proceedsto block 814; otherwise, the flowchart proceeds to block 812.

In block 812, when the last page written has not reached a stabilitypoint, additional sequential pages of the erase block are programmed(e.g., with dummy data) until the last page of the additional pageswritten is up to or past a stability point, similar to what is describedabove in the discussion of FIG. 6.

In block 814 of FIG. 8, when a stability point is reached, the eraseblock can be erased in response to the instruction of block 808.

Thus, the scanning operation of block 810 is performed only if the eraseblock is to be erased. Alternatively, all of the erase blocks in theNVMD can be scanned during bootup when the NVMD is returned to service.However, scanning all of the erase blocks can consume significantcomputational resources while increasing the time to complete thebootup. By instead scanning an erase block only if the erase block is tobe erased, the computational cost of scanning is spread out over timeand does not affect bootup time, and there is no visible increase ininput/output latency when the scan is performed at erase time.

In summary, in embodiments according to the present invention, thestability point of each erase block can be determined and thatinformation can be used to determine whether an erase block is stableand, if not, to stabilize the erase block before it is erased. Thus,embodiments according to the present invention improve the reliabilityof NVMDs (e.g., SSDs such as flash memory devices). Because it is nolonger necessary to avoid potentially unstable erase blocks, thecapacities of NVMDs are not reduced.

All or some of the operations represented by the blocks in theflowcharts 500, 600, 700, and 800 can be implemented ascomputer-executable instructions residing on some form of non-transitorycomputer-readable storage medium and performed by a computer system.

While the foregoing disclosure sets forth various embodiments usingspecific block diagrams, flowcharts, and examples, each block diagramcomponent, flowchart step, operation, and/or component described and/orillustrated herein may be implemented, individually and/or collectively,using a wide range of hardware, software, or firmware (or anycombination thereof) configurations. In addition, any disclosure ofcomponents contained within other components should be considered asexamples because many other architectures can be implemented to achievethe same functionality.

The process parameters and sequence of steps described and/orillustrated herein are given by way of example only and can be varied asdesired. For example, while the steps illustrated and/or describedherein may be shown or discussed in a particular order, these steps donot necessarily need to be performed in the order illustrated ordiscussed. The various example methods described and/or illustratedherein may also omit one or more of the steps described or illustratedherein or include additional steps in addition to those disclosed.

While various embodiments have been described and/or illustrated hereinin the context of fully functional computing systems, one or more ofthese example embodiments may be distributed as a program product in avariety of forms, regardless of the particular type of computer-readablemedia used to actually carry out the distribution. The embodimentsdisclosed herein may also be implemented using software modules thatperform certain tasks. These software modules may include script, batch,or other executable files that may be stored on a computer-readablestorage medium or in a computing system. These software modules mayconfigure a computing system to perform one or more of the exampleembodiments disclosed herein. One or more of the software modulesdisclosed herein may be implemented in a cloud computing environment.Cloud computing environments may provide various services andapplications via the Internet. These cloud-based services (e.g.,software as a service, platform as a service, infrastructure as aservice, etc.) may be accessible through a Web browser or other remoteinterface. Various functions described herein may be provided through aremote desktop environment or any other cloud-based computingenvironment.

Although the subject matter has been described in language specific tostructural features and/or methodological acts, it is to be understoodthat the subject matter defined in the disclosure is not necessarilylimited to the specific features or acts described above. Rather, thespecific features and acts described above are disclosed as exampleforms of implementing the disclosure.

Embodiments according to the invention are thus described. While thepresent disclosure has been described in particular embodiments, itshould be appreciated that the invention should not be construed aslimited by such embodiments, but rather construed according to thefollowing claims.

What is claimed is:
 1. A computer-implemented method, comprising:writing data to a first set of pages in a first erase block of anon-volatile memory die of a non-volatile memory device; receiving aninstruction to erase the first erase block; determining whether a lastwritten page of the first set of pages has reached a stability point;and in response to determining that the last written page has notreached a stability point: writing data to a second set of pages in thefirst erase block until the stability point is reached.
 2. The method ofclaim 1, further comprising: in response to determining that the lastwritten page has reached a stability point: erasing the first eraseblock.
 3. The method of claim 1, further comprising: comparing an erasetime of a page of the first erase block to erase times of other pages ofthe first erase block; and determining the page as stable when the erasetime is greater than the erase times of the other pages of the firsterase block.
 4. The method of claim 3, further comprising: identifyingthe page as the stability point when the page is determined as stable.5. The method of claim 1, further comprising: determining whether thelast written page in the first set of pages is a page identified asstable based on information identifying the last written page andinformation identifying the page identified as stable; and in responseto determining that the last written page is not the page identified asstable: determining that the last written page has not reached thestability point.
 6. The method of claim 5, further comprising: inresponse to determining that the last written page is the pageidentified as stable: determining that the last written page has reachedthe stability point; and executing the instruction to erase the firsterase block.
 7. The method of claim 1, further comprising: after anunplanned shutdown of the non-volatile memory device: receiving theinstruction to erase the first erase block during a bootup of thenon-volatile memory device; in response to receiving the instruction,scanning pages of the first erase block during the bootup of thenon-volatile memory device; and determining, based on the scanned pages,whether the last written page has reached the stability point.
 8. Themethod of claim 1, wherein the first set of pages comprise a firstsequence of contiguous pages of the first erase block.
 9. The method ofclaim 1, wherein two or more of the second set of pages are contiguouspages in the first erase block.
 10. The method of claim 1, wherein thesecond set of pages are different from the first set of pages.
 11. Anon-volatile memory device, comprising: one or more non-volatile memorydies; and a controller, wherein the controller is configured to: writedata to a first set of pages in a first erase block of a firstnon-volatile memory die of the one or more non-volatile memory dies;receive an instruction to erase the first erase block; determiningwhether a last written page of the first set of pages has reached astability point; and when the last written page has not reached astability point, write data to a second set of pages in the first eraseblock until the stability point is reached.
 12. The non-volatile memorydevice of claim 11, wherein the controller is configured to: when thelast written page has reached a stability point, execute the instructionto erase the first erase block.
 13. The non-volatile memory device ofclaim 11, wherein the controller is configured to: compare an erase timeof a page of the first erase block to erase times of other pages of thefirst erase block; and identify the page as stable when the erase timeis greater than the erase times of the other pages of the first eraseblock.
 14. The non-volatile memory device of claim 13, wherein thecontroller is configured to: identify the page as the stability pointwhen the erase time is greater than the erase times of the other pagesof the first erase block.
 15. The non-volatile memory device of claim13, wherein the controller is configured to: determine whether the lastwritten page in the first set of pages is a page identified as stablebased on information identifying the last written page and informationidentifying the page identified as stable; when the last written page isnot the page identified as stable, determine the last written page hasnot reached the stability point.
 16. The non-volatile memory device ofclaim 15, wherein the controller is configured to: when the last writtenpage is the page identified as stable, determine that the last writtenpage has reached the stability point; and execute the instruction toerase the first erase block.
 17. The non-volatile memory device of claim11, wherein the controller is configured to: after an unplanned shutdownof the non-volatile memory device: receive the instruction to erase thefirst erase block during a bootup of the non-volatile memory device; inresponse to the instruction to erase, scan pages of the first eraseblock during the bootup of the non-volatile memory device; anddetermine, based on the scanned pages, whether the last written page hasreached the stability point.
 18. The non-volatile memory device of claim11, wherein two or more of the first set of pages are a first sequenceof contiguous pages of the first erase block, wherein two or more of thesecond set of pages are contiguous pages in the first erase block, andwherein the second set of pages are different from the first set ofpages.
 19. A non-volatile memory device, comprising: one or morenon-volatile memory dies; means for writing data to a first set of pagesin a first erase block of a non-volatile memory die of a non-volatilememory device; means for receiving an instruction to erase the firsterase block; means for determining whether a last written page of thefirst set of pages has reached a stability point; and in response todetermining that the last written page has not reached a stabilitypoint: means for writing data to a second set of pages in the firsterase block until the stability point is reached.
 20. The non-volatilememory device of claim 19, comprising: in response to determining thatthe last written page has reached a stability point: means for erasingthe first erase block.